MOSFET stands for metal-oxide-semiconductor field-effect transistors. MOSFETs have four terminals: a source, gate, drain, and body/substrate. The body is assumed to be shorted with the source. The MOSFET is made of a single p-type Si wafer with doped n-type substrate at the source and drain, as well as metal contacts at the source, drain, and body. The gate spans the area above the source and drain, and is in contact with both regions. The gate consists of a thin silicon dioxide insulating layer(thickness $t_{o x}$ ) between the metal and the semiconductor, hence the name “metal-oxide-semiconductor.” The name “field-effect” stems from the movement of charges within MOSFETs through drift current.

Diagram_MOSFET

Channel Formation

Due to the properties of doped semiconductor regions, a depletion region forms between the n-regions and p-region. When all terminals are grounded, there is no current flowing for $v_{D S}$ . However, when a positive voltage $v_{GS}$ is applied to the gate, then majority holes under the gate are repelled and bound negative charges are revealed. Additionally, the positive voltage also attracts electrons, forming an n-type channel below the gate where current can flow. Thus, the p-type substrate below the gate is inverted.

Triode Region

I-V relation is curved as channel resistance increases with $v_{D S}$ .

Lateral (drain-source electric field)
$∣ E ∣ = \frac{v _{D S}}{L}$
Electron drift velocity
$v_{n - d r i f t} = μ_{n} ∣ E ∣$
Triode Resistance
$r_{D S} = \frac{1}{k _{n} ( V _{GS} - V _{T} )}$

Saturation Region

Increasing $v_{D S}$ causes a widening of the depletion region near the drain, leading to a decrease in channel thickness in the region.

PMOS

Similar to NMOS but with reversed doping and voltage polarities. The two are complementary. In the PMOS symbol, the source arrowhead points into the MOSFET, or the base arrowhead out of the MOSFET. $V_{D S}$ and $V_{T}$ are always negative.

Name	Equation	Info
Oxide capacitance	$C_{o x} = \frac{ϵ _{o x}}{t _{o x}} (F / m^{2})$	$ϵ_{o x} = 3.9 ϵ_{0} = 3.45 \times 1 0^{- 11} F / m$
Aspect ratio	$\frac{W}{L}$
Process transconductance	$k_{n}^{'} = μ_{n} C_{o x} (A / V^{2})$
Transconductance parameter	$k_{n} = k_{n}^{'} \frac{W}{L} = μ_{n} C_{o x} \frac{W}{L} (A / V^{2})$
Threshold voltage	$V_{T}$	Required to invert channel region Typically $0.3 V$ to $1 V$
Effective/overdrive voltage	NMOS $V_{O V} = V_{GS} - V_{T}$ PMOS $∣ V_{O V} ∣ = V_{SG} - ∣ V_{T} ∣$
Device parameter	$λ (V^{- 1}$ )	Depends on process parameters Smaller MOFSET lengths are greater
Channel charge	$∣ Q ∣ = C_{o x} (W L) V_{O V}$
Operating regions and Current Equations

Operating Region	NMOS Conditions	NMOS Current	PMOS Conditions	PMOS Current
Cutoff	$V_{GS} < V_{T}$	$I_{D} = 0$	$V_{SG} < ∣ V_{T} ∣$	$I_{D} = 0$
Triode	$V_{GS} \geq V_{T}$ $V_{D S} < V_{GS} - V_{T}$	$I_{D} = k_{n} (V_{GS} - V_{T} - \frac{1}{2} V_{D S}) V_{D S}$ For $V_{D S} < 50 mV$ , $\frac{1}{2} V_{D S}$ negligible	$V_{SG} \geq ∣ V_{T} ∣$ $V_{S D} < V_{SG} - ∣ V_{T} ∣$	$I_{D} = k_{p} (V_{SG} - ∣ V_{T} ∣ - \frac{1}{2} V_{S D}) V_{S D}$ For $V_{S D} < 50 mV$ , $\frac{1}{2} V_{S D}$ negligible
Saturation	$V_{GS} \geq V_{T}$ $V_{D S} \geq V_{GS} - V_{T}$	$I_{D} = \frac{k _{n}}{2} (V_{GS} - V_{T})^{2} (1 + λ V_{D S})$	$V_{SG} \geq ∣ V_{T} ∣$ $V_{S D} \geq V_{SG} - ∣ V_{T} ∣$	$I_{D} = \frac{k _{p}}{2} (V_{SG} - ∣ V_{T} ∣)^{2} (1 + λ V_{S D})$
Always $I_{G} = 0$

Small Signal Model

Transconductance
$g_{m} = k (V_{GS} - V_{T}) = 2 k I_{D} = \frac{2 I _{D}}{V _{GS} - V _{T}}$
Output Resistance
$r_{o} = \frac{1}{λ I _{D}}$

Topologies

See: Transistor Amplifier

Name	$A_{v}$	$R_{in}$	$R_{o u t}$
Common Source	$- g_{m} R_{D}$	$\infty$	$R_{D}$
Common Source with Degeneration	$- \frac{g _{m} R _{D}}{g _{m} R _{S} + 1}$	$\infty$	$R_{D}$
Common Gate	$g_{m} R_{D}$	$\frac{1}{g _{m}}$	$R_{D}$
Source Follower	$\frac{g _{m} R _{S}}{g _{m} R _{S} + 1}$	$\infty$	$R_{S} ∥ \frac{1}{g _{m}}$

Parasitic Capacitance

See: Miller Theorem

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MOSFET